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Fast Iteration: A Performance Design Requirement

Richard Smith
Micro Magic, Inc.
Sunnyvale, CA



As processor and memory designs become more and more comples, the time required to generate each new iteration of elements within those designs has ballooned, seriously impacting the schedules and budgets of IC development. For that reason, designers and design managers frequently elect to forgo iterations, compromising performance and economy in favor of meeting development schedules.

the design automation community has responded with tools and methodologies that attempt to reduce or even eliminate iterations as a basic step of the design process. In theory, EDA tools that could go directly from HCL to layout in a single pass would successfully capture the design intent with only minimal hands-on fine-tuning by the designer.

However, iterations are a fact of life for complez system-on-chip (SOC) design. The ability of a designer to tweak a block or circuit in the interest of overcoming timing issues or reducing the overall gate count is essential to the general success of any complex design effort. But most EDA tools have become so bloated and slow that each iterationis painful and disruptive to the design process.

Certainly, there are portions of any IC that can benefit greatly from a batch systhesis tool. But for those areas of an IC that require the direct involvement of the designer to ensure optimization and performance, a different set of tools is required that will allow the designer to implement changes and see almost immediately their effects on timing, layout and overall system performance. And thos tools must be streamlined to generate new iterations with an absolute minimum disruption to the design process -- and the least possible disruption to the design engineer.

Micro Magic, Inc. has developed a variety of such tools to enable high-speed design by dramatically reducing the time and effort required to perform successful iterations of complex IC designs.


The high degree of automation in today's design environment allows IC designers to implement a set of functions very quickly and with high confidence in their accuracy. In many cases, performance is sacrificed for a short design cycle. Although constantly being improved, EDA software consistently falls short of the creative capabilities of hghly skilled designers. Designs requiring high performance in speed, power or area cannot be achieved solely through the use of fully automated software; highly skilled designers still need to interact directly with critical parts of the design and evaluate many alternatives. when performance is a goal, cycle time and quality are dominated by the time required to complete each iteration and generate useable convergent information. Faced with time-consuming, difficult iterations, a designer or design manager will frequently forgo possible changes, sacrificing overall design quality.


Support for rapid design iteration is the greatest challenge. "Construct-by-correction" is a popular expression used for years by hardball ID designers. This is another name for iteration. High-speed digital design requires the incremental improvements of multiple convergent iterations to ensure the achievement of performance goals.

In other words, iteration itself is not the source of long design cycles. It is the difficulty in completing an iteration that increases design time and compromises strict schedules. Too often, the most time- consuming part of each iteration is not the actual simulation, but the time required to set up the run and to review the results. To achieve an improvement, the designer may need to view the design from several different perspectives in succession, only to find that moving between views is both difficult, requires many mminutes of wait-time, and may not offer convergent results. For example, all the effort that has gone into making SPICE or Verilog run faster can be rendered irrelevant by a design system that is hard to use, inflexible and difficult to control; lacks extensibility; and offers limited tool integration.


Micro Magic was founded as a processor design-services company by a team of Ph.D.s from Stanford, U.C. Berkeley and MIT who had been working together for some time designing high-speed processors. The team believed that, in order to achieve high performance in their designs, they would have to develop design automation tools with the greater emphasis on design rather than on automation.

The design team that created Micro Magic's tools did so because they were not able to acquire the needed capability on the open market. Its new design system had to have excellent graphics for rapid information transfer, ease of use, an ability to control every aspect of the design, and the ability to produce results very rapidly. The result was a deisgn system fordesigners, developed by designers who are still successfully designing high-speed processors. It includes such things as a full- custom layout editor that reads-in, displays and writes-out more than 50 times faster than the industry- standard applications. There are datapath design tools that are easy to control, with methodologies that produce optimized results that are a factor of two to four times faster than what can be achieved with a compiled approach. The fast iteration paradign provides for construct by correction necessary for performance.


The design system created by Micro Magic includes interfaces to major third-party batch simulation, synthesis and routing tools, as well as the ability to tightly integrate a tool when that made sense. For example, in the Micro Magic environment, a third party batch-synthesis tool might be used for one block of the design where specifications indicate it is clearly the best choice. Another block requiring maximum performance would have the full range of capabilities to drive the most detailed transistor-level design -- design entry, circuit analysis, real-time DRC- and LVS-correct layout, cross-probing between schematic and layout, critical path identification and analysis, and so on.

Design of high-performance circuits implies the ability to touch and control every aspect and every level of the design. The ability to operate at the chip level can be just as critical as operation at the transistor level. The key is being able to choose the level and point in the design with no penalty in design system performance. Micro Magic tools provide the ability to review design issues at the chip architecture level with only a few mouse clicks, and a few seconds later be able to make changes at the micron level. The system maintains electrically and physically correct hierarchy, and allows the appropriate choice for driving the tools.


In today's environment, engineers are very often modifying or re-designing circuits. In this form of IP reuse, the ability to create a cell library that provides maximum performance is obviously very important. Equally important is the ability to move to a new technology file and modify the cell library to continue providing maximum performance. The need to retarget IP comes frequently both from process migration and process tuning. but quickly making changes to cell libraries is the easy part of modification. The real challenge occurs when an ECO happens late in the design cycle. Micro Magic tools provide the ability to bring up a million-gate design, make the necessary changes, assure timing is maintained, and perform real-time DRC and LVS. When tapeout is very near, design speed becomes almost as important as speed of the design.

Another aspect of very rapid iterations is the use of very fast prototyping. The process-engineering field tells us that decisions made in the first 10 percent of the design dictate 80 percent of the final results. Rapid prototyping can be used to settle arguments at the architecture level that determine whether the design can be successful or not. Assumptions are always a part of the design specification, but the resulting design is far better when those assumptions are supported with some fast prototyping.

The design system described here is definitely unique. Its development approach has been based on the needs of designers who were actually using the tools as they were being developed. Three principles were followed in the development process: First and obviously, an accurate solution is required. Second, the solution must be available quickly if it is to support the design process rather than interrupt it. And third, the software will be used repeatedly for many design problems, so it must be easy to use and easy to modify. It is success with the last two principles that yields a tool that can significantly shorten an iteration cycle time.


Iteration is a requirement for high-performance IC designs. The Micro Magic design team not only accepts iteration, they embrace it. The difference here is that each step of improvement -- each iteration -- is completed very quickly. As IC design moves forward, more human creativity will be programmed into the next set of synthesis tools. By then, however, a new set of engineering challenges will demand additional creativity and very fast iteration to review the results of the last design changes.

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